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Correction to: A novel FPGA-based test-bench framework for SDI stream verification

EURASIP Journal on Image and Video Processing volume 2020, Article number: 45 (2020) Cite this article

The Original Article was published on 16 July 2020

Correction to: J Image Video Proc 2020, 31 (2020)

https://doi.org/10.1186/s13640-020-00515-5

Following publication of the original article [1], the authors identified a few errors in the published article.

  1. 1.

    Body text contains incorrect sentence - in a simulation, it is possible to analyze the different frequency rates, but it is missing a test generator able to communicate with transceiver. It should be corrected to - in a simulation, it is possible to analyze the different frequency rates, but it is missing a test generator able to communicate with the DUT through the transceiver

  2. 2.

    The Figs. 11 and 12 had been inverted. Correct Figs. 11 and 12 with captions should look as per below:

Fig. 11
figure 1

Output from the Omnitek video analyzer

Full size image
Fig. 12
figure 2

System connection to test the macroblock FPGA input/output chain

Full size image

The original article [1] has been corrected.

Reference

  1. G. Conti et al., A novel FPGA-based test-bench framework for SDI stream verification. J. Image Video Proc. 2020, 31 (2020). https://doi.org/10.1186/s13640-020-00515-5

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Authors and Affiliations

  1. Visual Telecommunications Applications Group, Universidad Politécnica de Madrid, Madrid, Spain

    Giuseppe Conti, Gustavo Hernández-Peñaloza & David Jiménez

  2. KIOS Research and Innovation Center of Excellence, University of Cyprus, Nicosia, Cyprus

    Christos Kyrkou & Theocharis Theocharides

  3. Department of Electrical and Computer Engineering, University of Cyprus, Nicosia, Cyprus

    Theocharis Theocharides

Authors
  1. Giuseppe Conti
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  2. Christos Kyrkou
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  3. Theocharis Theocharides
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  4. Gustavo Hernández-Peñaloza
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  5. David Jiménez
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Corresponding author

Correspondence to Giuseppe Conti.

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Conti, G., Kyrkou, C., Theocharides, T. et al. Correction to: A novel FPGA-based test-bench framework for SDI stream verification. J Image Video Proc. 2020, 45 (2020). https://doi.org/10.1186/s13640-020-00532-4

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  • DOI: https://doi.org/10.1186/s13640-020-00532-4