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Table 4 FPGA resource occupation comparison. DUT with TB: FPGA occupation resources with test-bench included. DUT only: FPGA occupation resources DUT only

From: A novel FPGA-based test-bench framework for SDI stream verification

Device utilization summary (estimated values)
Logic utilization Used Available Utilization
  DUT with TB DUT only DUT with TB DUT only DUT with TB DUT only
Number of slice registers 20,913 16,316 301,440 301,440 6% 5%
Number of slice LUTs 18,165 13,455 150,720 150,720 12% 8%
Number of fully used LUT-FF pairs 11,096 7592 27,982 22,179 39% 34%
Number of bonded used IOBs 155 102 600 600 25% 17%
Number of block RAM/FIFO 156 147 416 416 37% 35%
Number of BUFG/BUFGCTRLs 10 12 32 32 31% 37%