Table 5 Comparison of gate count and power consumption
From: Implementation of computation-reduced DCT using a novel method
Description | DCT architecture (Lee’s algorithm) | DCT with proposed row comparison unit |
|---|---|---|
Gate counts | 1251 | 1656 |
Cell area (μm2) | 35992 | 57829 |
Average power (mW) consumption (mW) | 8.0157 | 9.2727 |