Table 4 Function of control pin in PMA
From: High-performance hardware architectures for multi-level lifting-based discrete wavelet transform
Control (ctr) | Level of decomposition |
|---|---|
000 | 1 |
001 | 2 |
010 | 3 |
011 | 4 |
100 | 5 |
From: High-performance hardware architectures for multi-level lifting-based discrete wavelet transform
Control (ctr) | Level of decomposition |
|---|---|
000 | 1 |
001 | 2 |
010 | 3 |
011 | 4 |
100 | 5 |