Table 3 Mapping of register bank and predict/update module
From: High-performance hardware architectures for multi-level lifting-based discrete wavelet transform
Flag | Operation | Predict/update module | ||
|---|---|---|---|---|
| Â | Â | in1 | in2 | in3 |
0 | Predict | On-line | R4 | R2 |
1 | Update | R4 | R8 | R6 |