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Table 15 Comparison of FPGA synthesis results for RMA: image size 256 × 256 and j = 3

From: High-performance hardware architectures for multi-level lifting-based discrete wavelet transform

Arch.

Liao[10]

Xiong[16]

RMA (5, 3)

RMA (9, 7)

FPGA

Virtex-4

Virtex-4

Virtex-4

Virtex-4

Device

4VFX100FF1152-12

4VFX100FF1152-12

4VFX100FF1152-12

4VFX100FF1152-12

LE/slices

1,180

2,532

1,040

1,822

  1. LE, logic elements or cells.
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