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Table 6 Altera level analysis

From: Power-optimized log-based image processing system

Cores

Parameters

Altera family and devices

Cyclone

Cyclone II

Cyclone III

Cyclone IV E

EP1C12Q240C6

EP2C70F896I8

EP3C10F256C6

EP4CE115F29C7

DWT

Combinational functions

2,893

2,688

2,688

2,688

Logic registers

N/A

235

235

235

Memory (bits)

71,445

71,445

71,445

71,445

Fmax(MHz)

71.8

58.58

475.29

1,210.65

DWT with BPS

Combinational functions

4,114

4,072

4071

4,071

Logic registers

N/A

791

791

791

Memory (bits)

163,840

163,840

163,840

163,840

Fmax(MHz)

71.8

58.58

475.29

1,210.65