From: Real-time stereo matching architecture based on 2D MRF model: a memory-efficient systolic array
System
Style
MDE/s
Processor, no. PE
Clock speed
Adaptive window [5]
Local
819
ASIC, 512
200 MHz
DP chip [19]
295
FPGA, 128
50 MHz
Real-time DP [20]
Semi-Global
205
MMX, 8
2.2 GHz
Real-time BP [13]
Global
19.7
GPU, 26
670 MHz