Table 6 The YCrCb to RGB converter: exploration of pipeline optimization space
From: Pipeline synthesis and optimization of FPGA-based video processing applications with CAL
N stage | 2 | 3 |
|---|---|---|
T stage | 4.12 | 3.00 |
Reg-width best | 83 | 122 |
Reg-width worst | 92 | 131 |
Reg-width reduction (%) | 10.8 | 7.4 |
Feasible schedules | 3 | 3 |