From: Pipeline synthesis and optimization of FPGA-based video processing applications with CAL
Stage
Operators
1
2, 3, 5, 6, 7, 8, 9, 10
2
1, 4, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35