Table 1 FPGA resources on an ALTERA Stratix III EP3SL340.
From: An FPGA-based processing pipeline for high-definition stereo video
Unit | Comb. LUTs | Registers | Mem. [kB] | DSP |
|---|---|---|---|---|
Pre-proc. | 5, 794 (2%) | 4, 690 (2%) | 26 (1%) | 50 (9%) |
Warping | 29, 283 (11%) | 16, 723 (6%) | 431 (32%) | 187 (32%) |
Disp. Estim. | 54, 275 (20%) | 26, 378 (10%) | 140 (7%) | 0 (0) |
Infrastructure | 11, 564 (4%) | 14, 577 (5%) | 78 (4%) | 0 (0) |
Total | 100, 916 (37%) | 62, 368 (23%) | 892 (44%) | 237 (41%) |